source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c @ 46

Last change on this file since 46 was 46, checked in by jrpelegrina, 4 years ago

First release to Xenial

File size: 5.9 KB
Line 
1/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file is prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief CTRL_ACCESS interface for the AT45DBX data flash controller.
7 *
8 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
9 * - Supported devices:  All AVR32 devices with an SPI module can be used.
10 * - AppNote:
11 *
12 * \author               Atmel Corporation: http://www.atmel.com \n
13 *                       Support and FAQ: http://support.atmel.no/
14 *
15 ******************************************************************************/
16
17/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *
22 * 1. Redistributions of source code must retain the above copyright notice, this
23 * list of conditions and the following disclaimer.
24 *
25 * 2. Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials provided with the distribution.
28 *
29 * 3. The name of Atmel may not be used to endorse or promote products derived
30 * from this software without specific prior written permission.
31 *
32 * 4. This software may only be redistributed and used in connection with an Atmel
33 * AVR product.
34 *
35 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
36 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
37 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
38 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
39 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
41 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
42 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
44 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
45 *
46 */
47
48//_____  I N C L U D E S ___________________________________________________
49
50#include "conf_access.h"
51
52
53#if AT45DBX_MEM == ENABLE
54
55#include "conf_at45dbx.h"
56#include "at45dbx.h"
57#include "at45dbx_mem.h"
58
59
60//_____ D E F I N I T I O N S ______________________________________________
61
62//! Whether to detect write accesses to the memory.
63#define AT45DBX_MEM_TEST_CHANGE_STATE     ENABLED
64
65
66#if (ACCESS_USB == ENABLED || ACCESS_MEM_TO_RAM == ENABLED) && AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
67
68//! Memory data modified flag.
69static volatile Bool s_b_data_modify = FALSE;
70
71#endif
72
73
74/*! \name Control Interface
75 */
76//! @{
77
78
79Ctrl_status at45dbx_test_unit_ready(void)
80{
81  return (at45dbx_mem_check() == OK) ? CTRL_GOOD : CTRL_NO_PRESENT;
82}
83
84
85Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector)
86{
87  *u32_nb_sector = (AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) - 1;
88
89  return CTRL_GOOD;
90}
91
92
93Bool at45dbx_wr_protect(void)
94{
95  return FALSE;
96}
97
98
99Bool at45dbx_removal(void)
100{
101  return FALSE;
102}
103
104
105//! @}
106
107
108#if ACCESS_USB == ENABLED
109
110#include "usb_drv.h"
111#include "scsi_decoder.h"
112
113
114/*! \name MEM <-> USB Interface
115 */
116//! @{
117
118
119Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector)
120{
121  if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
122
123  at45dbx_read_open(addr);
124  at45dbx_read_multiple_sector(nb_sector);
125  at45dbx_read_close();
126
127  return CTRL_GOOD;
128}
129
130
131void at45dbx_read_multiple_sector_callback(const void *psector)
132{
133  U16 data_to_transfer = AT45DBX_SECTOR_SIZE;
134
135  // Transfer read sector to the USB interface.
136  while (data_to_transfer)
137  {
138    while (!Is_usb_in_ready(g_scsi_ep_ms_in))
139    {
140      if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_in))
141         return; // USB Reset
142    }         
143
144    Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in);
145    data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector,
146                                             data_to_transfer, &psector);
147    Usb_ack_in_ready_send(g_scsi_ep_ms_in);
148  }
149}
150
151
152Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector)
153{
154  if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
155
156#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
157  if (nb_sector) s_b_data_modify = TRUE;
158#endif
159
160  at45dbx_write_open(addr);
161  at45dbx_write_multiple_sector(nb_sector);
162  at45dbx_write_close();
163
164  return CTRL_GOOD;
165}
166
167
168void at45dbx_write_multiple_sector_callback(void *psector)
169{
170  U16 data_to_transfer = AT45DBX_SECTOR_SIZE;
171
172  // Transfer sector to write from the USB interface.
173  while (data_to_transfer)
174  {
175    while (!Is_usb_out_received(g_scsi_ep_ms_out))
176    {
177      if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_out))
178         return; // USB Reset
179    }         
180
181    Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out);
182    data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector,
183                                            data_to_transfer, &psector);
184    Usb_ack_out_received_free(g_scsi_ep_ms_out);
185  }
186}
187
188
189//! @}
190
191#endif  // ACCESS_USB == ENABLED
192
193
194#if ACCESS_MEM_TO_RAM == ENABLED
195
196/*! \name MEM <-> RAM Interface
197 */
198//! @{
199
200
201Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram)
202{
203  if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
204
205  at45dbx_read_open(addr);
206  at45dbx_read_sector_2_ram(ram);
207  at45dbx_read_close();
208
209  return CTRL_GOOD;
210}
211
212
213Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram)
214{
215  if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
216
217#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
218  s_b_data_modify = TRUE;
219#endif
220
221  at45dbx_write_open(addr);
222  at45dbx_write_sector_from_ram(ram);
223  at45dbx_write_close();
224
225  return CTRL_GOOD;
226}
227
228
229//! @}
230
231#endif  // ACCESS_MEM_TO_RAM == ENABLED
232
233
234#endif  // AT45DBX_MEM == ENABLE
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