source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c @ 4837

Last change on this file since 4837 was 4837, checked in by daduve, 2 years ago

Adding new version

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1/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file has been prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief GPIO driver for AVR32 UC3.
7 *
8 * This file defines a useful set of functions for the GPIO.
9 *
10 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
11 * - Supported devices:  All AVR32 devices with a GPIO module can be used.
12 * - AppNote:
13 *
14 * \author               Atmel Corporation: http://www.atmel.com \n
15 *                       Support and FAQ: http://support.atmel.no/
16 *
17 *****************************************************************************/
18
19/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
20 *
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 *
24 * 1. Redistributions of source code must retain the above copyright notice, this
25 * list of conditions and the following disclaimer.
26 *
27 * 2. Redistributions in binary form must reproduce the above copyright notice,
28 * this list of conditions and the following disclaimer in the documentation
29 * and/or other materials provided with the distribution.
30 *
31 * 3. The name of Atmel may not be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * 4. This software may only be redistributed and used in connection with an Atmel
35 * AVR product.
36 *
37 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
38 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
39 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
40 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
41 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
42 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
44 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
46 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
47 *
48 */
49
50#include "gpio.h"
51
52//! GPIO module instance.
53#define GPIO  AVR32_GPIO
54
55
56/*! \name Peripheral Bus Interface
57 */
58//! @{
59
60
61int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
62{
63  int status = GPIO_SUCCESS;
64  unsigned int i;
65
66  for (i = 0; i < size; i++)
67  {
68    status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
69    gpiomap++;
70  }
71
72  return status;
73}
74
75
76int gpio_enable_module_pin(unsigned int pin, unsigned int function)
77{
78  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
79
80  // Enable the correct function.
81  switch (function)
82  {
83  case 0: // A function.
84    gpio_port->pmr0c = 1 << (pin & 0x1F);
85    gpio_port->pmr1c = 1 << (pin & 0x1F);
86#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
87    gpio_port->pmr2c = 1 << (pin & 0x1F);
88#endif
89    break;
90
91  case 1: // B function.
92    gpio_port->pmr0s = 1 << (pin & 0x1F);
93    gpio_port->pmr1c = 1 << (pin & 0x1F);
94#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
95    gpio_port->pmr2c = 1 << (pin & 0x1F);
96#endif
97    break;
98
99  case 2: // C function.
100    gpio_port->pmr0c = 1 << (pin & 0x1F);
101    gpio_port->pmr1s = 1 << (pin & 0x1F);
102#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
103    gpio_port->pmr2c = 1 << (pin & 0x1F);
104#endif
105    break;
106
107  case 3: // D function.
108    gpio_port->pmr0s = 1 << (pin & 0x1F);
109    gpio_port->pmr1s = 1 << (pin & 0x1F);
110#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
111    gpio_port->pmr2c = 1 << (pin & 0x1F);
112#endif
113    break;
114
115#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
116  case 4: // E function.
117    gpio_port->pmr0c = 1 << (pin & 0x1F);
118    gpio_port->pmr1c = 1 << (pin & 0x1F);
119    gpio_port->pmr2s = 1 << (pin & 0x1F);
120    break;
121   
122  case 5: // F function.
123    gpio_port->pmr0s = 1 << (pin & 0x1F);
124    gpio_port->pmr1c = 1 << (pin & 0x1F);
125    gpio_port->pmr2s = 1 << (pin & 0x1F);
126    break;
127   
128  case 6: // G function.
129    gpio_port->pmr0c = 1 << (pin & 0x1F);
130    gpio_port->pmr1s = 1 << (pin & 0x1F);
131    gpio_port->pmr2s = 1 << (pin & 0x1F);
132    break;
133   
134  case 7: // H function.
135    gpio_port->pmr0s = 1 << (pin & 0x1F);
136    gpio_port->pmr1s = 1 << (pin & 0x1F);
137    gpio_port->pmr2s = 1 << (pin & 0x1F);
138    break;
139#endif
140
141  default:
142    return GPIO_INVALID_ARGUMENT;
143  }
144
145  // Disable GPIO control.
146  gpio_port->gperc = 1 << (pin & 0x1F);
147
148  return GPIO_SUCCESS;
149}
150
151
152void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
153{
154  unsigned int i;
155
156  for (i = 0; i < size; i++)
157  {
158    gpio_enable_gpio_pin(gpiomap->pin);
159    gpiomap++;
160  }
161}
162
163
164void gpio_enable_gpio_pin(unsigned int pin)
165{
166  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
167  gpio_port->oderc = 1 << (pin & 0x1F);
168  gpio_port->gpers = 1 << (pin & 0x1F);
169}
170
171
172// The open-drain mode is not synthesized on the current AVR32 products.
173// If one day some AVR32 products have this feature, the corresponding part
174// numbers should be listed in the #if below.
175// Note that other functions are available in this driver to use pins with open
176// drain in GPIO mode. The advantage of the open-drain mode functions over these
177// other functions is that they can be used not only in GPIO mode but also in
178// module mode.
179#if 0
180
181
182void gpio_enable_pin_open_drain(unsigned int pin)
183{
184  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
185  gpio_port->odmers = 1 << (pin & 0x1F);
186}
187
188
189void gpio_disable_pin_open_drain(unsigned int pin)
190{
191  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
192  gpio_port->odmerc = 1 << (pin & 0x1F);
193}
194
195
196#endif
197
198
199void gpio_enable_pin_pull_up(unsigned int pin)
200{
201  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
202  gpio_port->puers = 1 << (pin & 0x1F);
203#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
204  gpio_port->pderc = 1 << (pin & 0x1F);
205#endif
206}
207
208
209void gpio_disable_pin_pull_up(unsigned int pin)
210{
211  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
212  gpio_port->puerc = 1 << (pin & 0x1F);
213}
214
215#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
216// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
217
218/*! \brief Enables the pull-down resistor of a pin.
219 *
220 * \param pin The pin number.
221 */
222void gpio_enable_pin_pull_down(unsigned int pin)
223{
224  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
225  gpio_port->puerc = 1 << (pin & 0x1F);
226  gpio_port->pders = 1 << (pin & 0x1F);
227}
228
229/*! \brief Disables the pull-down resistor of a pin.
230 *
231 * \param pin The pin number.
232 */
233void gpio_disable_pin_pull_down(unsigned int pin)
234{
235  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
236  gpio_port->pderc = 1 << (pin & 0x1F);
237}
238
239/*! \brief Enables the buskeeper functionality on a pin.
240 *
241 * \param pin The pin number.
242 */
243void gpio_enable_pin_buskeeper(unsigned int pin)
244{
245  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
246  gpio_port->puers = 1 << (pin & 0x1F);
247  gpio_port->pders = 1 << (pin & 0x1F);
248}
249
250/*! \brief Disables the buskeeper functionality on a pin.
251 *
252 * \param pin The pin number.
253 */
254void gpio_disable_pin_buskeeper(unsigned int pin)
255{
256  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
257  gpio_port->puerc = 1 << (pin & 0x1F);
258  gpio_port->pderc = 1 << (pin & 0x1F);
259}
260
261#endif
262
263int gpio_get_pin_value(unsigned int pin)
264{
265  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
266  return (gpio_port->pvr >> (pin & 0x1F)) & 1;
267}
268
269
270int gpio_get_gpio_pin_output_value(unsigned int pin)
271{
272  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
273  return (gpio_port->ovr >> (pin & 0x1F)) & 1;
274}
275
276
277int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
278{
279  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
280  return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
281}
282
283
284void gpio_set_gpio_pin(unsigned int pin)
285{
286  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
287
288  gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
289  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
290  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
291}
292
293
294void gpio_clr_gpio_pin(unsigned int pin)
295{
296  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
297
298  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
299  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
300  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
301}
302
303
304void gpio_tgl_gpio_pin(unsigned int pin)
305{
306  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
307
308  gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
309  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
310  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
311}
312
313
314void gpio_set_gpio_open_drain_pin(unsigned int pin)
315{
316  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
317
318  gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
319  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
320}
321
322
323void gpio_clr_gpio_open_drain_pin(unsigned int pin)
324{
325  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
326
327  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
328  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
329  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
330}
331
332
333void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
334{
335  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
336
337  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
338  gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
339  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
340}
341
342
343void gpio_enable_pin_glitch_filter(unsigned int pin)
344{
345  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
346  gpio_port->gfers = 1 << (pin & 0x1F);
347}
348
349
350void gpio_disable_pin_glitch_filter(unsigned int pin)
351{
352  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
353  gpio_port->gferc = 1 << (pin & 0x1F);
354}
355
356/*! \brief Configure the edge detector of an input pin
357 *
358 * \param pin The pin number.
359 * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
360 *             or \ref GPIO_FALLING_EDGE).
361 *
362 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
363 */
364static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
365{
366  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
367 
368  // Configure the edge detector.
369  switch (mode)
370  {
371  case GPIO_PIN_CHANGE:
372    gpio_port->imr0c = 1 << (pin & 0x1F);
373    gpio_port->imr1c = 1 << (pin & 0x1F);
374    break;
375
376  case GPIO_RISING_EDGE:
377    gpio_port->imr0s = 1 << (pin & 0x1F);
378    gpio_port->imr1c = 1 << (pin & 0x1F);
379    break;
380
381  case GPIO_FALLING_EDGE:
382    gpio_port->imr0c = 1 << (pin & 0x1F);
383    gpio_port->imr1s = 1 << (pin & 0x1F);
384    break;
385
386  default:
387    return GPIO_INVALID_ARGUMENT;
388  }
389
390  return GPIO_SUCCESS;
391}
392
393
394int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
395{
396  volatile avr32_gpio_port_t  *gpio_port = &GPIO.port[pin >> 5];
397
398  // Enable the glitch filter.
399  gpio_port->gfers = 1 << (pin & 0x1F);
400
401  // Configure the edge detector.
402  if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
403    return(GPIO_INVALID_ARGUMENT);
404
405  // Enable interrupt.
406  gpio_port->iers = 1 << (pin & 0x1F);
407
408  return GPIO_SUCCESS;
409}
410
411
412void gpio_disable_pin_interrupt(unsigned int pin)
413{
414  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
415  gpio_port->ierc = 1 << (pin & 0x1F);
416}
417
418
419int gpio_get_pin_interrupt_flag(unsigned int pin)
420{
421  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
422  return (gpio_port->ifr >> (pin & 0x1F)) & 1;
423}
424
425
426void gpio_clear_pin_interrupt_flag(unsigned int pin)
427{
428  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
429  gpio_port->ifrc = 1 << (pin & 0x1F);
430}
431
432
433//#
434//# Peripheral Event System Support.
435//#
436#if UC3L
437int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
438{
439  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
440
441  if(TRUE == use_igf)
442  {
443    // Enable the glitch filter.
444    gpio_port->gfers = 1 << (pin & 0x1F);
445  }
446  else
447  {
448    // Disable the glitch filter.
449    gpio_port->gferc = 1 << (pin & 0x1F);
450  }
451
452  // Configure the edge detector.
453  return(gpio_configure_edge_detector(pin, mode));
454}
455
456#endif
457
458//! @}
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