source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.c @ 4837

Last change on this file since 4837 was 4837, checked in by daduve, 2 years ago

Adding new version

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[4837]1/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file is prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief TC driver for AVR32 UC3.
7 *
8 * AVR32 Timer/Counter driver module.
9 *
10 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
11 * - Supported devices:  All AVR32 devices with a TC module can be used.
12 * - AppNote:
13 *
14 * \author               Atmel Corporation: http://www.atmel.com \n
15 *                       Support and FAQ: http://support.atmel.no/
16 *
17 ******************************************************************************/
18
19/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
20 *
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 *
24 * 1. Redistributions of source code must retain the above copyright notice, this
25 * list of conditions and the following disclaimer.
26 *
27 * 2. Redistributions in binary form must reproduce the above copyright notice,
28 * this list of conditions and the following disclaimer in the documentation
29 * and/or other materials provided with the distribution.
30 *
31 * 3. The name of Atmel may not be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * 4. This software may only be redistributed and used in connection with an Atmel
35 * AVR product.
36 *
37 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
38 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
39 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
40 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
41 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
42 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
44 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
46 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
47 *
48 */
49
50#include <avr32/io.h>
51#include "compiler.h"
52#include "tc.h"
53
54
55int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel)
56{
57  // Check for valid input.
58  if (channel >= TC_NUMBER_OF_CHANNELS)
59    return TC_INVALID_ARGUMENT;
60
61  return tc->channel[channel].imr;
62}
63
64
65int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield)
66{
67  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
68
69  // Check for valid input.
70  if (channel >= TC_NUMBER_OF_CHANNELS)
71    return TC_INVALID_ARGUMENT;
72
73  // Enable the appropriate interrupts.
74  tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET |
75                             bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET |
76                             bitfield->ldras << AVR32_TC_LDRAS_OFFSET |
77                             bitfield->cpcs << AVR32_TC_CPCS_OFFSET |
78                             bitfield->cpbs << AVR32_TC_CPBS_OFFSET |
79                             bitfield->cpas << AVR32_TC_CPAS_OFFSET |
80                             bitfield->lovrs << AVR32_TC_LOVRS_OFFSET |
81                             bitfield->covfs << AVR32_TC_COVFS_OFFSET;
82
83  // Disable the appropriate interrupts.
84  if (global_interrupt_enabled) Disable_global_interrupt();
85  tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET |
86                             (~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET |
87                             (~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET |
88                             (~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET |
89                             (~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET |
90                             (~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET |
91                             (~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET |
92                             (~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET;
93  tc->channel[channel].sr;
94  if (global_interrupt_enabled) Enable_global_interrupt();
95
96  return 0;
97}
98
99
100int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src)
101{
102  // Check for valid input.
103  if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE)
104    return TC_INVALID_ARGUMENT;
105
106  // Clear bit-field and set the correct behavior.
107  tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) |
108            (ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE));
109
110  return 0;
111}
112
113
114int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt)
115{
116  // Check for valid input.
117  if (opt->channel >= TC_NUMBER_OF_CHANNELS)
118    return TC_INVALID_ARGUMENT;
119
120  // MEASURE SIGNALS: Capture operating mode.
121  tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET |
122                                  opt->ldra << AVR32_TC_LDRA_OFFSET |
123                                  0 << AVR32_TC_WAVE_OFFSET |
124                                  opt->cpctrg << AVR32_TC_CPCTRG_OFFSET |
125                                  opt->abetrg << AVR32_TC_ABETRG_OFFSET |
126                                  opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET|
127                                  opt->ldbdis << AVR32_TC_LDBDIS_OFFSET |
128                                  opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET |
129                                  opt->burst << AVR32_TC_BURST_OFFSET |
130                                  opt->clki << AVR32_TC_CLKI_OFFSET |
131                                  opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
132
133  return 0;
134}
135
136
137int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt)
138{
139  // Check for valid input.
140  if (opt->channel >= TC_NUMBER_OF_CHANNELS)
141    return TC_INVALID_ARGUMENT;
142
143  // GENERATE SIGNALS: Waveform operating mode.
144  tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET |
145                                  opt->beevt << AVR32_TC_BEEVT_OFFSET |
146                                  opt->bcpc << AVR32_TC_BCPC_OFFSET |
147                                  opt->bcpb << AVR32_TC_BCPB_OFFSET |
148                                  opt->aswtrg << AVR32_TC_ASWTRG_OFFSET |
149                                  opt->aeevt << AVR32_TC_AEEVT_OFFSET |
150                                  opt->acpc << AVR32_TC_ACPC_OFFSET |
151                                  opt->acpa << AVR32_TC_ACPA_OFFSET |
152                                  1 << AVR32_TC_WAVE_OFFSET |
153                                  opt->wavsel << AVR32_TC_WAVSEL_OFFSET |
154                                  opt->enetrg << AVR32_TC_ENETRG_OFFSET |
155                                  opt->eevt << AVR32_TC_EEVT_OFFSET |
156                                  opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET |
157                                  opt->cpcdis << AVR32_TC_CPCDIS_OFFSET |
158                                  opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET |
159                                  opt->burst << AVR32_TC_BURST_OFFSET |
160                                  opt->clki << AVR32_TC_CLKI_OFFSET |
161                                  opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
162
163  return 0;
164}
165
166
167int tc_start(volatile avr32_tc_t *tc, unsigned int channel)
168{
169  // Check for valid input.
170  if (channel >= TC_NUMBER_OF_CHANNELS)
171    return TC_INVALID_ARGUMENT;
172
173  // Enable, reset and start the selected timer/counter channel.
174  tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK;
175
176  return 0;
177}
178
179
180int tc_stop(volatile avr32_tc_t *tc, unsigned int channel)
181{
182  // Check for valid input.
183  if (channel >= TC_NUMBER_OF_CHANNELS)
184    return TC_INVALID_ARGUMENT;
185
186  // Disable the selected timer/counter channel.
187  tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK;
188
189  return 0;
190}
191
192
193int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel)
194{
195  // Check for valid input.
196  if (channel >= TC_NUMBER_OF_CHANNELS)
197    return TC_INVALID_ARGUMENT;
198
199  // Reset the selected timer/counter channel.
200  tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK;
201
202  return 0;
203}
204
205
206void tc_sync_trigger(volatile avr32_tc_t *tc)
207{
208  // Reset all channels of the selected timer/counter.
209  tc->bcr = AVR32_TC_BCR_SYNC_MASK;
210}
211
212
213void tc_sync_start(volatile avr32_tc_t *tc)
214{
215  unsigned int i;
216  // Enable the clock for each channel.
217  for(i=0; i<TC_NUMBER_OF_CHANNELS;i++)
218    tc->channel[i].ccr = AVR32_TC_CLKEN_MASK;
219   
220  // Reset all channels of the selected timer/counter.
221  tc->bcr = AVR32_TC_BCR_SYNC_MASK;
222}
223
224
225int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel)
226{
227  // Check for valid input.
228  if (channel >= TC_NUMBER_OF_CHANNELS)
229    return TC_INVALID_ARGUMENT;
230
231  return tc->channel[channel].sr;
232}
233
234
235int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel)
236{
237  // Check for valid input.
238  if (channel >= TC_NUMBER_OF_CHANNELS)
239    return TC_INVALID_ARGUMENT;
240
241  return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK);
242}
243
244
245int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel)
246{
247  // Check for valid input.
248  if (channel >= TC_NUMBER_OF_CHANNELS)
249    return TC_INVALID_ARGUMENT;
250
251  return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK);
252}
253
254
255int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel)
256{
257  // Check for valid input.
258  if (channel >= TC_NUMBER_OF_CHANNELS)
259    return TC_INVALID_ARGUMENT;
260
261  return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK);
262}
263
264
265int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel)
266{
267  // Check for valid input.
268  if (channel >= TC_NUMBER_OF_CHANNELS)
269    return TC_INVALID_ARGUMENT;
270
271  return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK);
272}
273
274
275int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
276{
277  // Check for valid input.
278  if (channel >= TC_NUMBER_OF_CHANNELS)
279    return TC_INVALID_ARGUMENT;
280
281  // This function is only available in WAVEFORM mode.
282  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
283    Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value);
284
285  return value;
286}
287
288
289int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
290{
291  // Check for valid input.
292  if (channel >= TC_NUMBER_OF_CHANNELS)
293    return TC_INVALID_ARGUMENT;
294
295  // This function is only available in WAVEFORM mode.
296  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
297    Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value);
298
299  return value;
300}
301
302
303int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
304{
305  // Check for valid input.
306  if (channel >= TC_NUMBER_OF_CHANNELS)
307    return TC_INVALID_ARGUMENT;
308
309  // This function is only available in WAVEFORM mode.
310  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
311    Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value);
312
313  return value;
314}
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