source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h @ 4837

Last change on this file since 4837 was 4837, checked in by daduve, 2 years ago

Adding new version

File size: 6.2 KB
Line 
1/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file is prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief NEWLIB_ADDONS USART include file for AVR32.
7 *
8 * - Compiler:           GNU GCC for AVR32
9 * - Supported devices:  All AVR32 devices can be used.
10 * - AppNote:
11 *
12 * \author               Atmel Corporation: http://www.atmel.com \n
13 *                       Support and FAQ: http://support.atmel.no/
14 *
15 ******************************************************************************/
16
17/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *
22 * 1. Redistributions of source code must retain the above copyright notice, this
23 * list of conditions and the following disclaimer.
24 *
25 * 2. Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials provided with the distribution.
28 *
29 * 3. The name of Atmel may not be used to endorse or promote products derived
30 * from this software without specific prior written permission.
31 *
32 * 4. This software may only be redistributed and used in connection with an Atmel
33 * AVR product.
34 *
35 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
36 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
37 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
38 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
39 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
41 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
42 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
44 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
45 *
46 */
47
48#ifndef __AVR32_NEWLIB_ADDONS_USART_H__
49#define __AVR32_NEWLIB_ADDONS_USART_H__
50
51#include <_ansi.h>
52
53#include "nlao_io.h"
54
55_BEGIN_STD_C
56
57struct usart3 {
58        volatile u32    us_cr;
59        volatile u32    us_mr;
60        volatile u32    us_ier;
61        volatile u32    us_idr;
62        volatile u32    us_imr;
63        volatile u32    us_csr;
64        volatile u32    us_rhr;
65        volatile u32    us_thr;
66        volatile u32    us_brgr;
67        volatile u32    us_rtor;
68        volatile u32    us_ttgr;
69        volatile u32    us_reserved[5];
70        volatile u32    us_fidi;
71        volatile u32    us_ner;
72        volatile u32    us_xxr;
73        volatile u32    us_if;
74};
75
76/* Register offsets */
77#define US_CR                   0x0000
78#define US_MR                   0x0004
79#define US_IER                  0x0008
80#define US_IDR                  0x000c
81#define US_IMR                  0x0010
82#define US_CSR                  0x0014
83#define US_RHR                  0x0018
84#define US_THR                  0x001c
85#define US_BRGR                 0x0020
86#define US_RTOR                 0x0024
87#define US_TTGR                 0x0028
88
89#define US_FIDI                 0x0040
90#define US_NER                  0x0044
91#define US_XXR                  0x0048
92#define US_IF                   0x004c
93
94#define US_RPR                  0x0100
95#define US_RCR                  0x0104
96#define US_TPR                  0x0108
97#define US_TCR                  0x010c
98#define US_RNPR                 0x0110
99#define US_RNCR                 0x0114
100#define US_TNPR                 0x0118
101#define US_TNCR                 0x011c
102#define US_PTCR                 0x0120
103#define US_PTSR                 0x0124
104
105
106
107
108/* USART3 Control Register */
109#define US_CR_RSTRX             (1 <<  2)
110#define US_CR_RSTTX             (1 <<  3)
111#define US_CR_RXEN              (1 <<  4)
112#define US_CR_RXDIS             (1 <<  5)
113#define US_CR_TXEN              (1 <<  6)
114#define US_CR_TXDIS             (1 <<  7)
115#define US_CR_RSTSTA            (1 <<  8)
116#define US_CR_STTBRK            (1 <<  9)
117#define US_CR_STPBRK            (1 << 10)
118
119#define US_CR_DTREN             (1 << 16)
120#define US_CR_DTRDIS            (1 << 17)
121#define US_CR_RTSEN             (1 << 18)
122#define US_CR_RTSDIS            (1 << 19)
123
124/* USART3 Mode Register */
125#define US_MR_MODE              (15 <<  0)
126#define US_MR_MODE_NORMAL       ( 0 <<  0)
127#define US_MR_MODE_HWFLOW       ( 2 <<  0)
128#define US_MR_CLKS              ( 3 <<  4)
129#define US_MR_CLKS_CLOCK        ( 0 <<  4)
130#define US_MR_CLKS_FDIV1        ( 1 <<  4)
131#define US_MR_CLKS_SLOW         ( 2 <<  4)
132#define US_MR_CLKS_EXT          ( 3 <<  4)
133#define US_MR_CHRL_5BITS        ( 0 <<  6)
134#define US_MR_CHRL_6BITS        ( 1 <<  6)
135#define US_MR_CHRL_7BITS        ( 2 <<  6)
136#define US_MR_CHRL_8BITS        ( 3 <<  6)
137#define US_MR_SYNC              ( 1 <<  8)
138#define US_MR_PAR_EVEN          ( 0 <<  9)
139#define US_MR_PAR_ODD           ( 1 <<  9)
140#define US_MR_PAR_SPACE         ( 2 <<  9)
141#define US_MR_PAR_MARK          ( 3 <<  9)
142#define US_MR_PAR_NONE          ( 4 <<  9)
143#define US_MR_PAR_MDROP         ( 6 <<  9)
144#define US_MR_NBSTOP_1BIT       ( 0 << 12)
145#define US_MR_NBSTOP_1_5BIT     ( 1 << 12)
146#define US_MR_NBSTOP_2BITS      ( 2 << 12)
147#define US_MR_OVER              ( 1 << 19)
148#define US_MR_OVER_X16          ( 0 << 19)
149#define US_MR_OVER_X8           ( 1 << 19)
150
151/* USART3 Channel Status Register */
152#define US_CSR_RXRDY            (1 <<  0)
153#define US_CSR_TXRDY            (1 <<  1)
154#define US_CSR_RXBRK            (1 <<  2)
155#define US_CSR_ENDRX            (1 <<  3)
156#define US_CSR_ENDTX            (1 <<  4)
157
158
159#define US_CSR_OVRE             (1 <<  5)
160#define US_CSR_FRAME            (1 <<  6)
161#define US_CSR_PARE             (1 <<  7)
162
163#define US_CSR_TXEMPTY          (1 <<  9)
164
165#define US_CSR_TXBUFE           (1 << 11)
166#define US_CSR_RXBUFF           (1 << 12)
167#define US_CSR_RIIC             (1 << 16)
168#define US_CSR_DSRIC            (1 << 17)
169#define US_CSR_DCDIC            (1 << 18)
170#define US_CSR_CTSIC            (1 << 19)
171#define US_CSR_RI               (1 << 20)
172#define US_CSR_DSR              (1 << 21)
173#define US_CSR_DCD              (1 << 22)
174#define US_CSR_CTS              (1 << 23)
175
176/* USART3 Baud Rate Generator Register */
177#define US_BRGR_CD_OFFSET       0
178#define US_BRGR_FP_OFFSET       16
179
180#define US_BRGR_CD_SIZE         16
181#define US_BRGR_FP_SIZE         3
182
183#define US_BRGR_CD              (0xFFFF <<  0)
184#define US_BRGR_FP              (     7 << 16)
185
186/*USART3 PDC Transfer Control Register */
187#define US_PTCR_RXTEN           (1 << 0)
188#define US_PTCR_RXTDIS          (1 << 1)
189#define US_PTCR_TXTEN           (1 << 8)
190#define US_PTCR_TXTDIS          (1 << 9)
191
192/*USART3 PDC Transfer Status Register */
193#define US_PTSR_RXTEN           (1 << 0)
194#define US_PTSR_TXTEN           (1 << 8)
195
196
197int usart_init(int baudrate);
198void usart_putc(char c);
199void usart_puts(const char *s);
200int usart_getc(void);
201int usart_tstc(void);
202void usart_setbrg(int baudrate, int cpu_clock);
203void set_usart_base(void *usart_base);
204
205
206_END_STD_C
207
208#endif /* MERLIN_USART3_H */
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