source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifiHD/src/board_init.c @ 4837

Last change on this file since 4837 was 4837, checked in by daduve, 2 years ago

Adding new version

File size: 8.4 KB
Line 
1/*! \page License
2 * Copyright (C) 2009, H&D Wireless AB All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright notice,
8 * this list of conditions and the following disclaimer.
9 *
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
20 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <pm.h>
30#include <flashc.h>
31#include <intc.h>
32#include <board.h>
33#include <gpio.h>
34#ifdef WITH_SDRAM
35 #include <sdramc.h>
36#endif
37#include <board_init.h>
38#include <spi.h>
39
40#ifndef NO_SERIAL /* The bootloader does not want serial port
41                   * code */
42#include <usart.h>
43
44int board_putchar(char c)
45{
46        int timeout = USART_DEFAULT_TIMEOUT;
47        if (c == '\n') {
48                do {
49                        if (!timeout--)
50                                return USART_FAILURE;
51                } while (usart_write_char(&CONFIG_CONSOLE_PORT, '\r') !=
52                         USART_SUCCESS);
53               
54                timeout = USART_DEFAULT_TIMEOUT;
55        }
56       
57        do {
58                if (!timeout--)
59                        return USART_FAILURE;
60        } while (usart_write_char(&CONFIG_CONSOLE_PORT, c) != USART_SUCCESS);
61
62        return USART_SUCCESS;
63}
64#endif /* NO_SERIAL */
65/**
66 * Initializes the MCU system clocks.
67 */
68static void
69init_sys_clocks(void)
70{
71
72        /* if we don't run on OSC0 don't switch to it since we don't know
73         * what kind of oscillator we have here
74         */
75         
76#if OSC == 0
77        /* switch to OSC0 to speed up the booting */
78        pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
79#endif
80
81       
82#ifndef USE_PLL
83        return;
84#endif
85       
86        /* For audio, ee have to use OSC1 on to generate the correct clockrate
87         * for the SSC
88         */
89#if OSC == 1
90        /* start oscillator1 */
91        pm_enable_osc1_crystal(&AVR32_PM, FOSC1);
92        pm_enable_clk1(&AVR32_PM, OSC1_STARTUP);
93#endif
94
95        /* configure pll multipliers */
96        pm_pll_setup(&AVR32_PM,
97                     0,          /* pll */
98                     PLL_MUL,    /* mul */
99                     1,          /* div */
100                     OSC,        /* osc */
101                     16);        /* lockcount */
102
103        /* set PLL operating range and divider (fpll = fvco/2)
104         * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1)
105         */
106        pm_pll_set_option(&AVR32_PM,
107                          0,  /* pll */
108                          1,  /* pll_freq */
109                          1,  /* pll_div2 */
110                          0); /* pll_wbwdisable. */
111 
112
113        /* start PLL0 and wait for the lock */
114        pm_pll_enable(&AVR32_PM, 0);
115        pm_wait_for_pll0_locked(&AVR32_PM);
116       
117        /* Set all peripheral clocks torun at master clock rate */
118        pm_cksel(&AVR32_PM,
119                 0,   /* pbadiv */
120                 0,   /* pbasel */
121                 0,   /* pbbdiv */
122                 0,   /* pbbsel */
123                 0,   /* hsbdiv */
124                 0);  /* hsbsel */ 
125       
126        /* Set one waitstate for the flash */
127        flashc_set_wait_state(1);
128       
129        /* Switch to PLL0 as the master clock */
130        pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
131}
132
133static void init_exceptions(void)
134{
135        extern void _evba;
136        Set_system_register(AVR32_EVBA, (int)&_evba);
137        Enable_global_exception();
138}
139
140static void init_hmatrix(void)
141{
142        union {
143                unsigned long                 scfg;
144                avr32_hmatrix_scfg_t          SCFG;
145        } u_avr32_hmatrix_scfg = { 
146                AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH]
147        };
148        u_avr32_hmatrix_scfg.SCFG.defmstr_type = 
149                AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
150        AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] = 
151                u_avr32_hmatrix_scfg.scfg;
152}
153
154static void init_interrupts(void)
155{
156        INTC_init_interrupts();
157        Enable_global_interrupt();
158}
159
160static void init_spi(void)
161{
162#if defined(WL_SPI)
163        int i;
164#endif
165       
166
167#if defined(AT45DBX_SPI)
168        static const gpio_map_t AT45DBX_SPI_GPIO_MAP = {
169                { AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION },
170                { AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION },
171                { AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION },
172                { AT45DBX_SPI_NPCS2_PIN, AT45DBX_SPI_NPCS2_FUNCTION },
173        };
174#endif
175
176       
177#if defined(WL_SPI)
178        const gpio_map_t WL_SPI_GPIO_MAP = {
179#if defined(WL_SPI_NPCS0)
180            WL_SPI_NPCS0,
181#endif
182            WL_SPI_NPCS, WL_SPI_MISO, WL_SPI_MOSI, WL_SPI_SCK
183        };
184#endif
185
186#if defined(WL_SPI) || defined(AT45DBX_SPI)
187        spi_options_t spiOptions = {
188                .modfdis = 1 /* only param used by spi_initMaster() */
189        };
190#endif
191
192#if defined(AT45DBX_SPI)
193        gpio_enable_module(AT45DBX_SPI_GPIO_MAP,
194                           sizeof(AT45DBX_SPI_GPIO_MAP) /
195                           sizeof(AT45DBX_SPI_GPIO_MAP[0]));
196        spi_initMaster(AT45DBX_SPI, &spiOptions);
197        spi_selectionMode(AT45DBX_SPI, 0, 0, 0);
198#endif
199
200#if defined(WL_SPI)
201        /* same pins might be initialized twice here */
202        gpio_enable_module(WL_SPI_GPIO_MAP,
203                           sizeof(WL_SPI_GPIO_MAP) /
204                           sizeof(WL_SPI_GPIO_MAP[0]));
205        for (i = 0; i < sizeof(WL_SPI_GPIO_MAP)/sizeof(WL_SPI_GPIO_MAP[0]); i++)
206                gpio_enable_pin_pull_up(WL_SPI_GPIO_MAP[i].pin);
207
208        /* same SPI controller might be initialized again */
209        spi_initMaster(&WL_SPI, &spiOptions);
210        spi_selectionMode(&WL_SPI, 0, 0, 0);
211#endif
212
213#if defined(AT45DBX_SPI)
214        spi_enable(AT45DBX_SPI);
215
216        /* put up flash reset pin */
217        gpio_set_gpio_pin(AT45DBX_CHIP_RESET);
218#endif
219
220#if defined(WL_SPI)
221        spi_enable(&WL_SPI);
222#endif
223}
224
225
226static void init_rs232(void)
227{
228#ifndef NO_SERIAL
229#if defined(BOARD_RS232_0)
230        const gpio_map_t BOARD_RS232_0_GPIO_MAP = {
231                BOARD_RS232_0_TX,
232                BOARD_RS232_0_RX,
233#if defined(BOARD_RS232_0_RTS) && defined (BOARD_RS232_0_CTS)
234                BOARD_RS232_0_RTS,
235                BOARD_RS232_0_CTS
236#endif
237               
238        };
239#endif
240
241#if defined(BOARD_RS232_1)
242        const gpio_map_t BOARD_RS232_1_GPIO_MAP = {
243                BOARD_RS232_1_TX,
244                BOARD_RS232_1_RX
245#if defined(BOARD_RS232_1_RTS) && defined (BOARD_RS232_1_CTS)
246                BOARD_RS232_1_RTS,
247                BOARD_RS232_1_CTS
248#endif
249        };
250#endif
251
252#if defined(BOARD_RS232_0)
253        gpio_enable_module(BOARD_RS232_0_GPIO_MAP,
254                           sizeof(BOARD_RS232_0_GPIO_MAP) / 
255                           sizeof(BOARD_RS232_0_GPIO_MAP[0]));
256#endif
257
258#if defined(BOARD_RS232_1)
259        gpio_enable_module(BOARD_RS232_1_GPIO_MAP,
260                           sizeof(BOARD_RS232_1_GPIO_MAP) / 
261                           sizeof(BOARD_RS232_1_GPIO_MAP[0]));
262#endif
263#endif /* NO_SERIAL */
264}
265
266static void init_printk(void)
267{
268#ifndef NO_SERIAL
269#if defined(CONFIG_CONSOLE_PORT)
270        const usart_options_t usart_options = {
271                .baudrate = 57600,
272                .charlength = 8,
273                .paritytype = USART_NO_PARITY,
274                .stopbits = USART_1_STOPBIT,
275                .channelmode = USART_NORMAL_CHMODE
276        };
277        usart_init_rs232(&CONFIG_CONSOLE_PORT, &usart_options, FPBA_HZ);
278#endif
279#endif /* NO_SERIAL */
280}
281
282void board_init(void)
283{
284       
285    init_exceptions();
286    init_hmatrix();
287    init_sys_clocks();
288    init_interrupts();
289
290    init_rs232();
291    init_printk();
292       
293#ifdef WITH_SDRAM
294    sdramc_init(FHSB_HZ);
295#endif
296    init_spi();
297}
Note: See TracBrowser for help on using the repository browser.