source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c @ 4837

Last change on this file since 4837 was 4837, checked in by daduve, 2 years ago

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1/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file is prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief USART driver for AVR32 UC3.
7 *
8 * This file contains basic functions for the AVR32 USART, with support for all
9 * modes, settings and clock speeds.
10 *
11 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
12 * - Supported devices:  All AVR32 devices with a USART module can be used.
13 * - AppNote:
14 *
15 * \author               Atmel Corporation: http://www.atmel.com \n
16 *                       Support and FAQ: http://support.atmel.no/
17 *
18 ******************************************************************************/
19
20/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
21 *
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions are met:
24 *
25 * 1. Redistributions of source code must retain the above copyright notice, this
26 * list of conditions and the following disclaimer.
27 *
28 * 2. Redistributions in binary form must reproduce the above copyright notice,
29 * this list of conditions and the following disclaimer in the documentation
30 * and/or other materials provided with the distribution.
31 *
32 * 3. The name of Atmel may not be used to endorse or promote products derived
33 * from this software without specific prior written permission.
34 *
35 * 4. This software may only be redistributed and used in connection with an Atmel
36 * AVR product.
37 *
38 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
39 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
41 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
42 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
44 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
45 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
47 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
48 *
49 */
50
51#include "compiler.h"
52#include "usart.h"
53
54
55//------------------------------------------------------------------------------
56/*! \name Private Functions
57 */
58//! @{
59
60
61/*! \brief Checks if the USART is in multidrop mode.
62 *
63 * \param usart Base address of the USART instance.
64 *
65 * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
66 */
67#if (defined __GNUC__)
68__attribute__((__always_inline__))
69#endif
70static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
71{
72  return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
73}
74
75
76/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
77 *         the USART asynchronous modes to generate a baud rate as close as
78 *         possible to the baud rate set point.
79 *
80 * Baud rate calculation:
81 * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
82 * The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
83 *
84 * \param usart     Base address of the USART instance.
85 * \param baudrate  Baud rate set point.
86 * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
87 *
88 * \retval USART_SUCCESS        Baud rate successfully initialized.
89 * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
90 */
91static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
92{
93  unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
94  unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
95  unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
96  unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
97
98  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
99    return USART_INVALID_INPUT;
100
101  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
102                             AVR32_USART_MR_SYNC_MASK |
103                             AVR32_USART_MR_OVER_MASK)) |
104              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
105              ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
106
107  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
108                fp << AVR32_USART_BRGR_FP_OFFSET;
109
110  return USART_SUCCESS;
111}
112
113
114/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
115 *         modes to generate a baud rate as close as possible to the baud rate
116 *         set point.
117 *
118 * Baud rate calculation:
119 * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
120 *
121 * \param usart     Base address of the USART instance.
122 * \param baudrate  Baud rate set point.
123 * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
124 *
125 * \retval USART_SUCCESS        Baud rate successfully initialized.
126 * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
127 */
128static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
129{
130  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
131
132  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
133    return USART_INVALID_INPUT;
134
135  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
136              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
137              AVR32_USART_MR_SYNC_MASK;
138
139  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
140
141  return USART_SUCCESS;
142}
143
144
145/*! \brief Selects the SCK pin as the source of baud rate for the USART
146 *         synchronous slave modes.
147 *
148 * \param usart Base address of the USART instance.
149 *
150 * \retval USART_SUCCESS  Baud rate successfully initialized.
151 */
152static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
153{
154  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
155              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
156              AVR32_USART_MR_SYNC_MASK;
157
158  return USART_SUCCESS;
159}
160
161
162/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
163 *         generate an ISO7816 clock as close as possible to the clock set point.
164 *
165 * ISO7816 clock calculation:
166 * \f$ Clock = \frac{SelectedClock}{CD} \f$.
167 *
168 * \param usart   Base address of the USART instance.
169 * \param clock   ISO7816 clock set point.
170 * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
171 *
172 * \retval USART_SUCCESS        ISO7816 clock successfully initialized.
173 * \retval USART_INVALID_INPUT  ISO7816 clock set point is out of range for the given input clock frequency.
174 */
175static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
176{
177  unsigned int cd = (pba_hz + clock / 2) / clock;
178
179  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
180    return USART_INVALID_INPUT;
181
182  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
183                             AVR32_USART_MR_SYNC_MASK |
184                             AVR32_USART_MR_OVER_MASK)) |
185              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
186              AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
187
188  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
189
190  return USART_SUCCESS;
191}
192
193
194#if defined(AVR32_USART_400_H_INCLUDED) || \
195    defined(AVR32_USART_410_H_INCLUDED) || \
196    defined(AVR32_USART_420_H_INCLUDED) || \
197    defined(AVR32_USART_440_H_INCLUDED) || \
198    defined(AVR32_USART_602_H_INCLUDED)
199
200
201/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
202 *         generate a baud rate as close as possible to the baud rate set point.
203 *
204 * Baud rate calculation:
205 * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
206 *
207 * \param usart     Base address of the USART instance.
208 * \param baudrate  Baud rate set point.
209 * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
210 *
211 * \retval USART_SUCCESS        Baud rate successfully initialized.
212 * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
213 */
214static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
215{
216  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
217
218  if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
219    return USART_INVALID_INPUT;
220
221  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
222              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
223
224  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
225
226  return USART_SUCCESS;
227}
228
229
230/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
231 *         slave mode.
232 *
233 * \param usart Base address of the USART instance.
234 *
235 * \retval USART_SUCCESS  Baud rate successfully initialized.
236 */
237static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
238{
239  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
240              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
241
242  return USART_SUCCESS;
243}
244
245
246#endif  // USART rev. >= 4.0.0
247
248
249//! @}
250
251
252//------------------------------------------------------------------------------
253/*! \name Initialization Functions
254 */
255//! @{
256
257
258void usart_reset(volatile avr32_usart_t *usart)
259{
260  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
261
262  // Disable all USART interrupts.
263  // Interrupts needed should be set explicitly on every reset.
264  if (global_interrupt_enabled) Disable_global_interrupt();
265  usart->idr = 0xFFFFFFFF;
266  usart->csr;
267  if (global_interrupt_enabled) Enable_global_interrupt();
268
269  // Reset mode and other registers that could cause unpredictable behavior after reset.
270  usart->mr = 0;
271  usart->rtor = 0;
272  usart->ttgr = 0;
273
274  // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
275  // reset status bits and turn off DTR and RTS.
276  usart->cr = AVR32_USART_CR_RSTRX_MASK   |
277              AVR32_USART_CR_RSTTX_MASK   |
278              AVR32_USART_CR_RSTSTA_MASK  |
279              AVR32_USART_CR_RSTIT_MASK   |
280              AVR32_USART_CR_RSTNACK_MASK |
281#ifndef AVR32_USART_440_H_INCLUDED
282// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
283              AVR32_USART_CR_DTRDIS_MASK  |
284#endif
285              AVR32_USART_CR_RTSDIS_MASK;
286}
287
288
289int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
290{
291  // Reset the USART and shutdown TX and RX.
292  usart_reset(usart);
293
294  // Check input values.
295  if (!opt || // Null pointer.
296      opt->charlength < 5 || opt->charlength > 9 ||
297      opt->paritytype > 7 ||
298      opt->stopbits > 2 + 255 ||
299      opt->channelmode > 3 ||
300      usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
301    return USART_INVALID_INPUT;
302
303  if (opt->charlength == 9)
304  {
305    // Character length set to 9 bits. MODE9 dominates CHRL.
306    usart->mr |= AVR32_USART_MR_MODE9_MASK;
307  }
308  else
309  {
310    // CHRL gives the character length (- 5) when MODE9 = 0.
311    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
312  }
313
314  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
315               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
316
317  if (opt->stopbits > USART_2_STOPBITS)
318  {
319    // Set two stop bits
320    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
321    // and a timeguard period gives the rest.
322    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
323  }
324  else
325    // Insert 1, 1.5 or 2 stop bits.
326    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
327
328  // Set normal mode.
329  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
330              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
331
332  // Setup complete; enable communication.
333  // Enable input and output.
334  usart->cr = AVR32_USART_CR_RXEN_MASK |
335              AVR32_USART_CR_TXEN_MASK;
336
337  return USART_SUCCESS;
338}
339
340
341int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
342{
343  // Reset the USART and shutdown TX and RX.
344  usart_reset(usart);
345
346  // Check input values.
347  if (!opt || // Null pointer.
348      opt->charlength < 5 || opt->charlength > 9 ||
349      opt->paritytype > 7 ||
350      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
351      opt->channelmode > 3 ||
352      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
353    return USART_INVALID_INPUT;
354
355  if (opt->charlength == 9)
356  {
357    // Character length set to 9 bits. MODE9 dominates CHRL.
358    usart->mr |= AVR32_USART_MR_MODE9_MASK;
359  }
360  else
361  {
362    // CHRL gives the character length (- 5) when MODE9 = 0.
363    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
364  }
365
366  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
367               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
368
369  if (opt->stopbits > USART_2_STOPBITS)
370  {
371    // Set two stop bits
372    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
373    // and a timeguard period gives the rest.
374    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
375  }
376  else
377    // Insert 1 or 2 stop bits.
378    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
379
380  // Set normal mode.
381  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
382              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
383
384  // Setup complete; enable communication.
385  // Enable only output as input is not possible in synchronous mode without
386  // transferring clock.
387  usart->cr = AVR32_USART_CR_TXEN_MASK;
388
389  return USART_SUCCESS;
390}
391
392
393int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
394{
395  // First: Setup standard RS232.
396  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
397    return USART_INVALID_INPUT;
398
399  // Set hardware handshaking mode.
400  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
401              AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
402
403  return USART_SUCCESS;
404}
405
406
407int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
408{
409  // First: Setup standard RS232.
410  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
411    return USART_INVALID_INPUT;
412
413  // Set modem mode.
414  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
415              AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
416
417  return USART_SUCCESS;
418}
419
420
421int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
422{
423  // Reset the USART and shutdown TX and RX.
424  usart_reset(usart);
425
426  // Check input values.
427  if (!opt || // Null pointer.
428      opt->charlength < 5 || opt->charlength > 9 ||
429      opt->paritytype > 7 ||
430      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
431      opt->channelmode > 3 ||
432      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
433    return USART_INVALID_INPUT;
434
435  if (opt->charlength == 9)
436  {
437    // Character length set to 9 bits. MODE9 dominates CHRL.
438    usart->mr |= AVR32_USART_MR_MODE9_MASK;
439  }
440  else
441  {
442    // CHRL gives the character length (- 5) when MODE9 = 0.
443    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
444  }
445
446  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
447               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
448
449  if (opt->stopbits > USART_2_STOPBITS)
450  {
451    // Set two stop bits
452    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
453    // and a timeguard period gives the rest.
454    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
455  }
456  else
457    // Insert 1 or 2 stop bits.
458    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
459
460  // Set normal mode.
461  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
462              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
463              AVR32_USART_MR_CLKO_MASK;
464
465  // Setup complete; enable communication.
466  // Enable input and output.
467  usart->cr = AVR32_USART_CR_RXEN_MASK |
468              AVR32_USART_CR_TXEN_MASK;
469
470  return USART_SUCCESS;
471}
472
473
474int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
475{
476  // Reset the USART and shutdown TX and RX.
477  usart_reset(usart);
478
479  // Check input values.
480  if (!opt || // Null pointer.
481      opt->charlength < 5 || opt->charlength > 9 ||
482      opt->paritytype > 7 ||
483      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
484      opt->channelmode > 3 ||
485      usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
486    return USART_INVALID_INPUT;
487
488  if (opt->charlength == 9)
489  {
490    // Character length set to 9 bits. MODE9 dominates CHRL.
491    usart->mr |= AVR32_USART_MR_MODE9_MASK;
492  }
493  else
494  {
495    // CHRL gives the character length (- 5) when MODE9 = 0.
496    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
497  }
498
499  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
500               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
501
502  if (opt->stopbits > USART_2_STOPBITS)
503  {
504    // Set two stop bits
505    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
506    // and a timeguard period gives the rest.
507    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
508  }
509  else
510    // Insert 1 or 2 stop bits.
511    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
512
513  // Set normal mode.
514  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
515              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
516
517  // Setup complete; enable communication.
518  // Enable input and output.
519  usart->cr = AVR32_USART_CR_RXEN_MASK |
520              AVR32_USART_CR_TXEN_MASK;
521
522  return USART_SUCCESS;
523}
524
525
526int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
527{
528  // First: Setup standard RS232.
529  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
530    return USART_INVALID_INPUT;
531
532  // Set RS485 mode.
533  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
534              AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
535
536  return USART_SUCCESS;
537}
538
539
540int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
541                    long pba_hz, unsigned char irda_filter)
542{
543  // First: Setup standard RS232.
544  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
545    return USART_INVALID_INPUT;
546
547  // Set IrDA filter.
548  usart->ifr = irda_filter;
549
550  // Set IrDA mode and activate filtering of input.
551  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
552              AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
553              AVR32_USART_MR_FILTER_MASK;
554
555  return USART_SUCCESS;
556}
557
558
559int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
560{
561  // Reset the USART and shutdown TX and RX.
562  usart_reset(usart);
563
564  // Check input values.
565  if (!opt || // Null pointer.
566      opt->paritytype > 1)
567    return USART_INVALID_INPUT;
568
569  if (t == 0)
570  {
571    // Set USART mode to ISO7816, T=0.
572    // The T=0 protocol always uses 2 stop bits.
573    usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
574                AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
575                opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
576  }
577  else if (t == 1)
578  {
579    // Only LSB first in the T=1 protocol.
580    // max_iterations field is only used in T=0 mode.
581    if (opt->bit_order != 0 ||
582        opt->max_iterations != 0)
583      return USART_INVALID_INPUT;
584
585    // Set USART mode to ISO7816, T=1.
586    // The T=1 protocol always uses 1 stop bit.
587    usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
588                AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
589  }
590  else
591    return USART_INVALID_INPUT;
592
593  if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
594    return USART_INVALID_INPUT;
595
596  // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
597  usart->fidi = opt->fidi_ratio;
598
599  // Set ISO7816 spesific options in the MODE register.
600  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
601               AVR32_USART_MR_CLKO_MASK | // Enable clock output.
602               opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
603               opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
604               opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
605
606  // Setup complete; enable the receiver by default.
607  usart_iso7816_enable_receiver(usart);
608
609  return USART_SUCCESS;
610}
611
612
613#if defined(AVR32_USART_400_H_INCLUDED) || \
614    defined(AVR32_USART_410_H_INCLUDED) || \
615    defined(AVR32_USART_420_H_INCLUDED) || \
616    defined(AVR32_USART_440_H_INCLUDED) || \
617    defined(AVR32_USART_602_H_INCLUDED)
618
619
620int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
621{
622  // Reset the USART and shutdown TX and RX.
623  usart_reset(usart);
624
625  // Check input values.
626  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
627    return USART_INVALID_INPUT;
628
629  usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET;  // LIN master mode.
630
631  // Setup complete; enable communication.
632  // Enable input and output.
633  usart->cr = AVR32_USART_CR_RXEN_MASK |
634              AVR32_USART_CR_TXEN_MASK;
635
636  return USART_SUCCESS;
637}
638
639
640int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
641{
642  // Reset the USART and shutdown TX and RX.
643  usart_reset(usart);
644
645  // Check input values.
646  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
647    return USART_INVALID_INPUT;
648
649  usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
650
651  // Setup complete; enable communication.
652  // Enable input and output.
653  usart->cr = AVR32_USART_CR_RXEN_MASK |
654              AVR32_USART_CR_TXEN_MASK;
655
656  return USART_SUCCESS;
657}
658
659
660int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
661{
662  // Reset the USART and shutdown TX and RX.
663  usart_reset(usart);
664
665  // Check input values.
666  if (!opt || // Null pointer.
667      opt->charlength < 5 || opt->charlength > 9 ||
668      opt->spimode > 3 ||
669      opt->channelmode > 3 ||
670      usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
671    return USART_INVALID_INPUT;
672
673  if (opt->charlength == 9)
674  {
675    // Character length set to 9 bits. MODE9 dominates CHRL.
676    usart->mr |= AVR32_USART_MR_MODE9_MASK;
677  }
678  else
679  {
680    // CHRL gives the character length (- 5) when MODE9 = 0.
681    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
682  }
683
684  usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
685               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
686               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
687               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET |            // SPI clock polarity.
688               AVR32_USART_MR_CLKO_MASK;                                      // Drive SCK pin.
689
690  // Setup complete; enable communication.
691  // Enable input and output.
692  usart->cr = AVR32_USART_CR_RXEN_MASK |
693              AVR32_USART_CR_TXEN_MASK;
694
695  return USART_SUCCESS;
696}
697
698
699int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
700{
701  // Reset the USART and shutdown TX and RX.
702  usart_reset(usart);
703
704  // Check input values.
705  if (!opt || // Null pointer.
706      opt->charlength < 5 || opt->charlength > 9 ||
707      opt->spimode > 3 ||
708      opt->channelmode > 3 ||
709      usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
710    return USART_INVALID_INPUT;
711
712  if (opt->charlength == 9)
713  {
714    // Character length set to 9 bits. MODE9 dominates CHRL.
715    usart->mr |= AVR32_USART_MR_MODE9_MASK;
716  }
717  else
718  {
719    // CHRL gives the character length (- 5) when MODE9 = 0.
720    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
721  }
722
723  usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET |  // SPI slave mode.
724               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
725               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
726               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET;             // SPI clock polarity.
727
728  // Setup complete; enable communication.
729  // Enable input and output.
730  usart->cr = AVR32_USART_CR_RXEN_MASK |
731              AVR32_USART_CR_TXEN_MASK;
732
733  return USART_SUCCESS;
734}
735
736
737#endif  // USART rev. >= 4.0.0
738
739
740//! @}
741
742
743//------------------------------------------------------------------------------
744#if defined(AVR32_USART_400_H_INCLUDED) || \
745    defined(AVR32_USART_410_H_INCLUDED) || \
746    defined(AVR32_USART_420_H_INCLUDED) || \
747    defined(AVR32_USART_440_H_INCLUDED) || \
748    defined(AVR32_USART_602_H_INCLUDED)
749
750
751/*! \name SPI Control Functions
752 */
753//! @{
754
755
756int usart_spi_selectChip(volatile avr32_usart_t *usart)
757{
758  // Force the SPI chip select.
759  usart->cr = AVR32_USART_CR_RTSEN_MASK;
760
761  return USART_SUCCESS;
762}
763
764
765int usart_spi_unselectChip(volatile avr32_usart_t *usart)
766{
767  int timeout = USART_DEFAULT_TIMEOUT;
768
769  do
770  {
771    if (!timeout--) return USART_FAILURE;
772  } while (!usart_tx_empty(usart));
773
774  // Release the SPI chip select.
775  usart->cr = AVR32_USART_CR_RTSDIS_MASK;
776
777  return USART_SUCCESS;
778}
779
780
781//! @}
782
783
784#endif  // USART rev. >= 4.0.0
785
786
787//------------------------------------------------------------------------------
788/*! \name Transmit/Receive Functions
789 */
790//! @{
791
792
793int usart_send_address(volatile avr32_usart_t *usart, int address)
794{
795  // Check if USART is in multidrop / RS485 mode.
796  if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
797
798  // Prepare to send an address.
799  usart->cr = AVR32_USART_CR_SENDA_MASK;
800
801  // Write the address to TX.
802  usart_bw_write_char(usart, address);
803
804  return USART_SUCCESS;
805}
806
807
808int usart_write_char(volatile avr32_usart_t *usart, int c)
809{
810  if (usart_tx_ready(usart))
811  {
812    usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
813    return USART_SUCCESS;
814  }
815  else
816    return USART_TX_BUSY;
817}
818
819
820int usart_putchar(volatile avr32_usart_t *usart, int c)
821{
822  int timeout = USART_DEFAULT_TIMEOUT;
823
824  if (c == '\n')
825  {
826    do
827    {
828      if (!timeout--) return USART_FAILURE;
829    } while (usart_write_char(usart, '\r') != USART_SUCCESS);
830
831    timeout = USART_DEFAULT_TIMEOUT;
832  }
833
834  do
835  {
836    if (!timeout--) return USART_FAILURE;
837  } while (usart_write_char(usart, c) != USART_SUCCESS);
838
839  return USART_SUCCESS;
840}
841
842
843int usart_read_char(volatile avr32_usart_t *usart, int *c)
844{
845  // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
846  // would mean that an address char has been received.
847  if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
848                    AVR32_USART_CSR_FRAME_MASK |
849                    AVR32_USART_CSR_PARE_MASK))
850    return USART_RX_ERROR;
851
852  // No error; if we really did receive a char, read it and return SUCCESS.
853  if (usart_test_hit(usart))
854  {
855    *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
856    return USART_SUCCESS;
857  }
858  else
859    return USART_RX_EMPTY;
860}
861
862
863int usart_getchar(volatile avr32_usart_t *usart)
864{
865  int c, ret;
866
867  while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
868
869  if (ret == USART_RX_ERROR)
870    return USART_FAILURE;
871
872  return c;
873}
874
875
876void usart_write_line(volatile avr32_usart_t *usart, const char *string)
877{
878  while (*string != '\0')
879    usart_putchar(usart, *string++);
880}
881
882
883int usart_get_echo_line(volatile avr32_usart_t *usart)
884{
885  int rx_char;
886  int retval = USART_SUCCESS;
887
888  while (1)
889  {
890    rx_char = usart_getchar(usart);
891    if (rx_char == USART_FAILURE)
892    {
893      usart_write_line(usart, "Error!!!\n");
894      retval = USART_FAILURE;
895      break;
896    }
897    if (rx_char == '\x03')
898    {
899      retval = USART_FAILURE;
900      break;
901    }
902    usart_putchar(usart, rx_char);
903    if (rx_char == '\r')
904    {
905      usart_putchar(usart, '\n');
906      break;
907    }
908  }
909
910  return retval;
911}
912
913
914//! @}
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