source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/hardware/arduino/avr/firmwares/wifishield/wifi_dnld/src/clocks.c @ 46

Last change on this file since 46 was 46, checked in by jrpelegrina, 5 years ago

First release to Xenial

File size: 3.5 KB
Line 
1/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*! \page License
4 * Copyright (C) 2009, H&D Wireless AB All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice,
10 * this list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
15 *
16 * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived
17 * from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
22 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31
32#include <avr32/io.h>
33#include "board.h"
34#include "clocks.h"
35#include "pm.h"
36#include "flashc.h"
37#include "gpio.h"
38
39/**
40 * Initializes the MCU system clocks.
41 */
42void
43init_sys_clocks(void)
44{
45        /* switch to OSC0 to speed up the booting */
46        pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
47   
48#ifndef USE_PLL
49        return;
50#endif
51       
52        /* For audio, ee have to use OSC1 on to generate the correct clockrate
53         * for the SSC
54         */
55#if OSC == 1
56        /* start oscillator1 */
57        pm_enable_osc1_crystal(&AVR32_PM, FOSC1);
58        pm_enable_clk1(&AVR32_PM, OSC1_STARTUP);
59#endif
60
61        /* configure pll multipliers */
62        pm_pll_setup(&AVR32_PM,
63                     0,          /* pll */
64                     PLL_MUL,    /* mul */
65                     1,          /* div */
66                     OSC,        /* osc */
67                     16);        /* lockcount */
68
69        /* set PLL operating range and divider (fpll = fvco/2)
70         * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1)
71         */
72        pm_pll_set_option(&AVR32_PM,
73                          0,  /* pll */
74                          1,  /* pll_freq */
75                          1,  /* pll_div2 */
76                          0); /* pll_wbwdisable. */
77 
78
79        /* start PLL0 and wait for the lock */
80        pm_pll_enable(&AVR32_PM, 0);
81        pm_wait_for_pll0_locked(&AVR32_PM);
82       
83        /* Set all peripheral clocks torun at master clock rate */
84        pm_cksel(&AVR32_PM,
85                 0,   /* pbadiv */
86                 0,   /* pbasel */
87                 0,   /* pbbdiv */
88                 0,   /* pbbsel */
89                 0,   /* hsbdiv */
90                 0);  /* hsbsel */ 
91       
92        /* Set one waitstate for the flash */
93        flashc_set_wait_state(1);
94       
95        /* Switch to PLL0 as the master clock */
96        pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
97
98#if OSC == 1
99        pm_configure_usb_clock();
100#endif
101}
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