source: arduino-1-6-7/trunk/fuentes/arduino-ide-amd64/libraries/WiFi/extras/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.h @ 46

Last change on this file since 46 was 46, checked in by jrpelegrina, 4 years ago

First release to Xenial

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1/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
2
3/*This file is prepared for Doxygen automatic documentation generation.*/
4/*! \file *********************************************************************
5 *
6 * \brief Timer/Counter driver for AVR32 UC3.
7 *
8 * AVR32 Timer/Counter driver module.
9 *
10 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
11 * - Supported devices:  All AVR32 devices with a TC module can be used.
12 * - AppNote:
13 *
14 * \author               Atmel Corporation: http://www.atmel.com \n
15 *                       Support and FAQ: http://support.atmel.no/
16 *
17 ******************************************************************************/
18
19/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
20 *
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 *
24 * 1. Redistributions of source code must retain the above copyright notice, this
25 * list of conditions and the following disclaimer.
26 *
27 * 2. Redistributions in binary form must reproduce the above copyright notice,
28 * this list of conditions and the following disclaimer in the documentation
29 * and/or other materials provided with the distribution.
30 *
31 * 3. The name of Atmel may not be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * 4. This software may only be redistributed and used in connection with an Atmel
35 * AVR product.
36 *
37 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
38 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
39 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
40 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
41 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
42 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
44 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
46 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
47 *
48 */
49
50#ifndef _TC_H_
51#define _TC_H_
52
53#include <avr32/io.h>
54
55
56//! TC driver functions return value in case of invalid argument(s).
57#define TC_INVALID_ARGUMENT                     (-1)
58
59//! Number of timer/counter channels.
60#define TC_NUMBER_OF_CHANNELS                   (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))
61
62/*! \name External Clock Signal 0 Selection
63 */
64//! @{
65#define TC_CH0_EXT_CLK0_SRC_TCLK0               AVR32_TC_TC0XC0S_TCLK0
66#define TC_CH0_EXT_CLK0_SRC_NO_CLK              AVR32_TC_TC0XC0S_NO_CLK
67#define TC_CH0_EXT_CLK0_SRC_TIOA1               AVR32_TC_TC0XC0S_TIOA1
68#define TC_CH0_EXT_CLK0_SRC_TIOA2               AVR32_TC_TC0XC0S_TIOA2
69//! @}
70
71/*! \name External Clock Signal 1 Selection
72 */
73//! @{
74#define TC_CH1_EXT_CLK1_SRC_TCLK1               AVR32_TC_TC1XC1S_TCLK1
75#define TC_CH1_EXT_CLK1_SRC_NO_CLK              AVR32_TC_TC1XC1S_NO_CLK
76#define TC_CH1_EXT_CLK1_SRC_TIOA0               AVR32_TC_TC1XC1S_TIOA0
77#define TC_CH1_EXT_CLK1_SRC_TIOA2               AVR32_TC_TC1XC1S_TIOA2
78//! @}
79
80/*! \name External Clock Signal 2 Selection
81 */
82//! @{
83#define TC_CH2_EXT_CLK2_SRC_TCLK2               AVR32_TC_TC2XC2S_TCLK2
84#define TC_CH2_EXT_CLK2_SRC_NO_CLK              AVR32_TC_TC2XC2S_NO_CLK
85#define TC_CH2_EXT_CLK2_SRC_TIOA0               AVR32_TC_TC2XC2S_TIOA0
86#define TC_CH2_EXT_CLK2_SRC_TIOA1               AVR32_TC_TC2XC2S_TIOA1
87//! @}
88
89/*! \name Event/Trigger Actions on Output
90 */
91//! @{
92#define TC_EVT_EFFECT_NOOP                      AVR32_TC_NONE
93#define TC_EVT_EFFECT_SET                       AVR32_TC_SET
94#define TC_EVT_EFFECT_CLEAR                     AVR32_TC_CLEAR
95#define TC_EVT_EFFECT_TOGGLE                    AVR32_TC_TOGGLE
96//! @}
97
98/*! \name RC Compare Trigger Enable
99 */
100//! @{
101#define TC_NO_TRIGGER_COMPARE_RC                0
102#define TC_TRIGGER_COMPARE_RC                   1
103//! @}
104
105/*! \name Waveform Selection
106 */
107//! @{
108#define TC_WAVEFORM_SEL_UP_MODE                 AVR32_TC_WAVSEL_UP_NO_AUTO
109#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER      AVR32_TC_WAVSEL_UP_AUTO
110#define TC_WAVEFORM_SEL_UPDOWN_MODE             AVR32_TC_WAVSEL_UPDOWN_NO_AUTO
111#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER  AVR32_TC_WAVSEL_UPDOWN_AUTO
112//! @}
113
114/*! \name TIOA or TIOB External Trigger Selection
115 */
116//! @{
117#define TC_EXT_TRIG_SEL_TIOA                    1
118#define TC_EXT_TRIG_SEL_TIOB                    0
119//! @}
120
121/*! \name External Event Selection
122 */
123//! @{
124#define TC_EXT_EVENT_SEL_TIOB_INPUT             AVR32_TC_EEVT_TIOB_INPUT
125#define TC_EXT_EVENT_SEL_XC0_OUTPUT             AVR32_TC_EEVT_XC0_OUTPUT
126#define TC_EXT_EVENT_SEL_XC1_OUTPUT             AVR32_TC_EEVT_XC1_OUTPUT
127#define TC_EXT_EVENT_SEL_XC2_OUTPUT             AVR32_TC_EEVT_XC2_OUTPUT
128//! @}
129
130/*! \name Edge Selection
131 */
132//! @{
133#define TC_SEL_NO_EDGE                          AVR32_TC_EEVTEDG_NO_EDGE
134#define TC_SEL_RISING_EDGE                      AVR32_TC_EEVTEDG_POS_EDGE
135#define TC_SEL_FALLING_EDGE                     AVR32_TC_EEVTEDG_NEG_EDGE
136#define TC_SEL_EACH_EDGE                        AVR32_TC_EEVTEDG_BOTH_EDGES
137//! @}
138
139/*! \name Burst Signal Selection
140 */
141//! @{
142#define TC_BURST_NOT_GATED                      AVR32_TC_BURST_NOT_GATED
143#define TC_BURST_CLK_AND_XC0                    AVR32_TC_BURST_CLK_AND_XC0
144#define TC_BURST_CLK_AND_XC1                    AVR32_TC_BURST_CLK_AND_XC1
145#define TC_BURST_CLK_AND_XC2                    AVR32_TC_BURST_CLK_AND_XC2
146//! @}
147
148/*! \name Clock Invert
149 */
150//! @{
151#define TC_CLOCK_RISING_EDGE                    0
152#define TC_CLOCK_FALLING_EDGE                   1
153//! @}
154
155/*! \name Clock Selection
156 */
157//! @{
158#define TC_CLOCK_SOURCE_TC1                     AVR32_TC_TCCLKS_TIMER_CLOCK1
159#define TC_CLOCK_SOURCE_TC2                     AVR32_TC_TCCLKS_TIMER_CLOCK2
160#define TC_CLOCK_SOURCE_TC3                     AVR32_TC_TCCLKS_TIMER_CLOCK3
161#define TC_CLOCK_SOURCE_TC4                     AVR32_TC_TCCLKS_TIMER_CLOCK4
162#define TC_CLOCK_SOURCE_TC5                     AVR32_TC_TCCLKS_TIMER_CLOCK5
163#define TC_CLOCK_SOURCE_XC0                     AVR32_TC_TCCLKS_XC0
164#define TC_CLOCK_SOURCE_XC1                     AVR32_TC_TCCLKS_XC1
165#define TC_CLOCK_SOURCE_XC2                     AVR32_TC_TCCLKS_XC2
166//! @}
167
168
169//! Timer/counter interrupts.
170typedef struct
171{
172  unsigned int                 :24;
173
174  //! External trigger interrupt.
175  unsigned int etrgs           : 1;
176
177  //! RB load interrupt.
178  unsigned int ldrbs           : 1;
179
180  //! RA load interrupt.
181  unsigned int ldras           : 1;
182
183  //! RC compare interrupt.
184  unsigned int cpcs            : 1;
185
186  //! RB compare interrupt.
187  unsigned int cpbs            : 1;
188
189  //! RA compare interrupt.
190  unsigned int cpas            : 1;
191
192  //! Load overrun interrupt.
193  unsigned int lovrs           : 1;
194
195  //! Counter overflow interrupt.
196  unsigned int covfs           : 1;
197} tc_interrupt_t;
198
199//! Parameters when initializing a timer/counter in capture mode.
200typedef struct
201{
202  //! Channel to initialize.
203  unsigned int channel            ;
204
205  unsigned int                 :12;
206
207  //! RB loading selection:\n
208  //!   - \ref TC_SEL_NO_EDGE;\n
209  //!   - \ref TC_SEL_RISING_EDGE;\n
210  //!   - \ref TC_SEL_FALLING_EDGE;\n
211  //!   - \ref TC_SEL_EACH_EDGE.
212  unsigned int ldrb            : 2;
213
214  //! RA loading selection:\n
215  //!   - \ref TC_SEL_NO_EDGE;\n
216  //!   - \ref TC_SEL_RISING_EDGE;\n
217  //!   - \ref TC_SEL_FALLING_EDGE;\n
218  //!   - \ref TC_SEL_EACH_EDGE.
219  unsigned int ldra            : 2;
220
221  unsigned int                 : 1;
222
223  //! RC compare trigger enable:\n
224  //!   - \ref TC_NO_TRIGGER_COMPARE_RC;\n
225  //!   - \ref TC_TRIGGER_COMPARE_RC.
226  unsigned int cpctrg          : 1;
227
228  unsigned int                 : 3;
229
230  //! TIOA or TIOB external trigger selection:\n
231  //!   - \ref TC_EXT_TRIG_SEL_TIOA;\n
232  //!   - \ref TC_EXT_TRIG_SEL_TIOB.
233  unsigned int abetrg          : 1;
234
235  //! External trigger edge selection:\n
236  //!   - \ref TC_SEL_NO_EDGE;\n
237  //!   - \ref TC_SEL_RISING_EDGE;\n
238  //!   - \ref TC_SEL_FALLING_EDGE;\n
239  //!   - \ref TC_SEL_EACH_EDGE.
240  unsigned int etrgedg         : 2;
241
242  //! Counter clock disable with RB loading:\n
243  //!   - \c FALSE;\n
244  //!   - \c TRUE.
245  unsigned int ldbdis          : 1;
246
247  //! Counter clock stopped with RB loading:\n
248  //!   - \c FALSE;\n
249  //!   - \c TRUE.
250  unsigned int ldbstop         : 1;
251
252  //! Burst signal selection:\n
253  //!   - \ref TC_BURST_NOT_GATED;\n
254  //!   - \ref TC_BURST_CLK_AND_XC0;\n
255  //!   - \ref TC_BURST_CLK_AND_XC1;\n
256  //!   - \ref TC_BURST_CLK_AND_XC2.
257  unsigned int burst           : 2;
258
259  //! Clock invert:\n
260  //!   - \ref TC_CLOCK_RISING_EDGE;\n
261  //!   - \ref TC_CLOCK_FALLING_EDGE.
262  unsigned int clki            : 1;
263
264  //! Clock selection:\n
265  //!   - \ref TC_CLOCK_SOURCE_TC1;\n
266  //!   - \ref TC_CLOCK_SOURCE_TC2;\n
267  //!   - \ref TC_CLOCK_SOURCE_TC3;\n
268  //!   - \ref TC_CLOCK_SOURCE_TC4;\n
269  //!   - \ref TC_CLOCK_SOURCE_TC5;\n
270  //!   - \ref TC_CLOCK_SOURCE_XC0;\n
271  //!   - \ref TC_CLOCK_SOURCE_XC1;\n
272  //!   - \ref TC_CLOCK_SOURCE_XC2.
273  unsigned int tcclks          : 3;
274} tc_capture_opt_t;
275
276//! Parameters when initializing a timer/counter in waveform mode.
277typedef struct
278{
279  //! Channel to initialize.
280  unsigned int channel            ;
281
282  //! Software trigger effect on TIOB:\n
283  //!   - \ref TC_EVT_EFFECT_NOOP;\n
284  //!   - \ref TC_EVT_EFFECT_SET;\n
285  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
286  //!   - \ref TC_EVT_EFFECT_TOGGLE.
287  unsigned int bswtrg          : 2;
288
289  //! External event effect on TIOB:\n
290  //!   - \ref TC_EVT_EFFECT_NOOP;\n
291  //!   - \ref TC_EVT_EFFECT_SET;\n
292  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
293  //!   - \ref TC_EVT_EFFECT_TOGGLE.
294  unsigned int beevt           : 2;
295
296  //! RC compare effect on TIOB:\n
297  //!   - \ref TC_EVT_EFFECT_NOOP;\n
298  //!   - \ref TC_EVT_EFFECT_SET;\n
299  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
300  //!   - \ref TC_EVT_EFFECT_TOGGLE.
301  unsigned int bcpc            : 2;
302
303  //! RB compare effect on TIOB:\n
304  //!   - \ref TC_EVT_EFFECT_NOOP;\n
305  //!   - \ref TC_EVT_EFFECT_SET;\n
306  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
307  //!   - \ref TC_EVT_EFFECT_TOGGLE.
308  unsigned int bcpb            : 2;
309
310  //! Software trigger effect on TIOA:\n
311  //!   - \ref TC_EVT_EFFECT_NOOP;\n
312  //!   - \ref TC_EVT_EFFECT_SET;\n
313  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
314  //!   - \ref TC_EVT_EFFECT_TOGGLE.
315  unsigned int aswtrg          : 2;
316
317  //! External event effect on TIOA:\n
318  //!   - \ref TC_EVT_EFFECT_NOOP;\n
319  //!   - \ref TC_EVT_EFFECT_SET;\n
320  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
321  //!   - \ref TC_EVT_EFFECT_TOGGLE.
322  unsigned int aeevt           : 2;
323
324  //! RC compare effect on TIOA:\n
325  //!   - \ref TC_EVT_EFFECT_NOOP;\n
326  //!   - \ref TC_EVT_EFFECT_SET;\n
327  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
328  //!   - \ref TC_EVT_EFFECT_TOGGLE.
329  unsigned int acpc            : 2;
330
331  //! RA compare effect on TIOA:\n
332  //!   - \ref TC_EVT_EFFECT_NOOP;\n
333  //!   - \ref TC_EVT_EFFECT_SET;\n
334  //!   - \ref TC_EVT_EFFECT_CLEAR;\n
335  //!   - \ref TC_EVT_EFFECT_TOGGLE.
336  unsigned int acpa            : 2;
337
338  unsigned int                 : 1;
339
340  //! Waveform selection:\n
341  //!   - \ref TC_WAVEFORM_SEL_UP_MODE;\n
342  //!   - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n
343  //!   - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n
344  //!   - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER.
345  unsigned int wavsel          : 2;
346
347  //! External event trigger enable:\n
348  //!   - \c FALSE;\n
349  //!   - \c TRUE.
350  unsigned int enetrg          : 1;
351
352  //! External event selection:\n
353  //!   - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n
354  //!   - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n
355  //!   - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n
356  //!   - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT.
357  unsigned int eevt            : 2;
358
359  //! External event edge selection:\n
360  //!   - \ref TC_SEL_NO_EDGE;\n
361  //!   - \ref TC_SEL_RISING_EDGE;\n
362  //!   - \ref TC_SEL_FALLING_EDGE;\n
363  //!   - \ref TC_SEL_EACH_EDGE.
364  unsigned int eevtedg         : 2;
365
366  //! Counter clock disable with RC compare:\n
367  //!   - \c FALSE;\n
368  //!   - \c TRUE.
369  unsigned int cpcdis          : 1;
370
371  //! Counter clock stopped with RC compare:\n
372  //!   - \c FALSE;\n
373  //!   - \c TRUE.
374  unsigned int cpcstop         : 1;
375
376  //! Burst signal selection:\n
377  //!   - \ref TC_BURST_NOT_GATED;\n
378  //!   - \ref TC_BURST_CLK_AND_XC0;\n
379  //!   - \ref TC_BURST_CLK_AND_XC1;\n
380  //!   - \ref TC_BURST_CLK_AND_XC2.
381  unsigned int burst           : 2;
382
383  //! Clock invert:\n
384  //!   - \ref TC_CLOCK_RISING_EDGE;\n
385  //!   - \ref TC_CLOCK_FALLING_EDGE.
386  unsigned int clki            : 1;
387
388  //! Clock selection:\n
389  //!   - \ref TC_CLOCK_SOURCE_TC1;\n
390  //!   - \ref TC_CLOCK_SOURCE_TC2;\n
391  //!   - \ref TC_CLOCK_SOURCE_TC3;\n
392  //!   - \ref TC_CLOCK_SOURCE_TC4;\n
393  //!   - \ref TC_CLOCK_SOURCE_TC5;\n
394  //!   - \ref TC_CLOCK_SOURCE_XC0;\n
395  //!   - \ref TC_CLOCK_SOURCE_XC1;\n
396  //!   - \ref TC_CLOCK_SOURCE_XC2.
397  unsigned int tcclks          : 3;
398} tc_waveform_opt_t;
399
400
401/*! \brief Reads timer/counter interrupt settings.
402 *
403 * \param tc              Pointer to the TC instance to access.
404 * \param channel         The TC instance channel to access.
405 *
406 * \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t.
407 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
408 */
409extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel);
410
411/*! \brief Enables various timer/counter interrupts.
412 *
413 * \param tc              Pointer to the TC instance to access.
414 * \param channel         The TC instance channel to access.
415 * \param bitfield        The interrupt enable configuration.
416 *
417 * \retval 0 Success.
418 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
419 */
420extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield);
421
422/*! \brief Selects which external clock to use and how to configure it.
423 *
424 * \param tc              Pointer to the TC instance to access.
425 * \param channel         The TC instance channel to access.
426 * \param ext_clk_sig_src External clock signal selection:
427 *   \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0;
428 *   \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK;
429 *   \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1;
430 *   \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2;
431 *   \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1;
432 *   \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK;
433 *   \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0;
434 *   \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2;
435 *   \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2;
436 *   \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK;
437 *   \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0;
438 *   \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1.
439 *
440 * \retval 0 Success.
441 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
442 */
443extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src);
444
445/*! \brief Sets options for timer/counter capture initialization.
446 *
447 * \param tc              Pointer to the TC instance to access.
448 * \param opt             Options for capture mode.
449 *
450 * \retval 0 Success.
451 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
452 */
453extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt);
454
455/*! \brief Sets options for timer/counter waveform initialization.
456 *
457 * \param tc              Pointer to the TC instance to access.
458 * \param opt             Options for waveform generation.
459 *
460 * \retval 0 Success.
461 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
462 */
463extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt);
464
465/*! \brief Starts a timer/counter.
466 *
467 * \param tc              Pointer to the TC instance to access.
468 * \param channel         The TC instance channel to access.
469 *
470 * \retval 0 Success.
471 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
472 */
473extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel);
474
475/*! \brief Stops a timer/counter.
476 *
477 * \param tc              Pointer to the TC instance to access.
478 * \param channel         The TC instance channel to access.
479 *
480 * \retval 0 Success.
481 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
482 */
483extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel);
484
485/*! \brief Performs a software trigger: the counter is reset and the clock is started.
486 *
487 * \param tc              Pointer to the TC instance to access.
488 * \param channel         The TC instance channel to access.
489 *
490 * \retval 0 Success.
491 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
492 */
493extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel);
494
495/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels.
496 *
497 * \param tc              Pointer to the TC instance to access.
498 */
499extern void tc_sync_trigger(volatile avr32_tc_t *tc);
500
501/*! \brief Start all TC channels simultaneously.
502 *
503 * \param tc              Pointer to the TC instance to access.
504 */
505extern void tc_sync_start(volatile avr32_tc_t *tc);
506
507/*! \brief Reads the status register.
508 *
509 * \param tc              Pointer to the TC instance to access.
510 * \param channel         The TC instance channel to access.
511 *
512 * \retval >=0 Status register value.
513 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
514 */
515extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel);
516
517/*! \brief Reads the channel's TC counter and returns the value.
518 *
519 * \param tc              Pointer to the TC instance to access.
520 * \param channel         The TC instance channel to access.
521 *
522 * \retval >=0 TC counter value.
523 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
524 */
525extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel);
526
527/*! \brief Reads the channel's RA register and returns the value.
528 *
529 * \param tc              Pointer to the TC instance to access.
530 * \param channel         The TC instance channel to access.
531 *
532 * \retval >=0 RA register value.
533 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
534 */
535extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel);
536
537/*! \brief Reads the channel's RB register and returns the value.
538 *
539 * \param tc              Pointer to the TC instance to access.
540 * \param channel         The TC instance channel to access.
541 *
542 * \retval >=0 RB register value.
543 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
544 */
545extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel);
546
547/*! \brief Reads the channel's RC register and returns the value.
548 *
549 * \param tc              Pointer to the TC instance to access.
550 * \param channel         The TC instance channel to access.
551 *
552 * \retval >=0 RC register value.
553 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
554 */
555extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel);
556
557/*! \brief Writes a value to the channel's RA register.
558 *
559 * \param tc              Pointer to the TC instance to access.
560 * \param channel         The TC instance channel to access.
561 * \param value           Value to write to the RA register.
562 *
563 * \retval >=0 Written value.
564 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
565 */
566extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
567
568/*! \brief Writes a value to the channel's RB register.
569 *
570 * \param tc              Pointer to the TC instance to access.
571 * \param channel         The TC instance channel to access.
572 * \param value           Value to write to the RB register.
573 *
574 * \retval >=0 Written value.
575 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
576 */
577extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
578
579/*! \brief Writes a value to the channel's RC register.
580 *
581 * \param tc              Pointer to the TC instance to access.
582 * \param channel         The TC instance channel to access.
583 * \param value           Value to write to the RC register.
584 *
585 * \retval >=0 Written value.
586 * \retval TC_INVALID_ARGUMENT Invalid argument(s).
587 */
588extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
589
590
591#endif  // _TC_H_
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